Koichiro Nishizawa, Ayumu Matsumoto, Takayuki Hisaka, Yoshikazu Kawai, Kaoru Kadoiwa, Yu Nakamura, Satoshi Ichikawa, Kazuyuki Onoe, Yoshiki Kojima, Naoki Fukumuro, Shinji Yae
Journal of Applied Physics 139(1) 015303 2026年1月5日 査読有り
In gallium arsenide (GaAs) semiconductor devices, wafer warpage caused by backside electrode stress complicates wafer handling during subsequent processing and affects device characteristics. Warpage has been primarily attributed to a high-stress nickel–gallium–arsenide (Ni3GaAs) reaction layer that forms at the interface between the electroless Ni–P plating film and the GaAs substrate during annealing at 240 °C for 1 h. In this study, the crystallinity of the Ni3GaAs layer and its lattice-matching state with the GaAs substrate were investigated using transmission electron microscopy. Ni3GaAs grew epitaxially, with its (0-111) plane aligned with the GaAs(001) plane, and four differently oriented microtwin crystals coexisted. Each microtwin crystal exhibited a columnar morphology approximately 10 nm in width and was aligned along the [001] GaAs direction. Ni3GaAs crystals were lattice-matched to the (220) and (2–20) planes perpendicular to the GaAs(001) surface and exhibited 0.8% compression and 3.3% elongation in the Ni3GaAs [01-12] and [2-110] directions, respectively, resulting in an average tensile strain of 1.3%. This strain was identified as the cause of wafer warpage. These findings clarify the microstructure and lattice strain characteristics of the Ni3GaAs alloy layer, contributing to a better understanding of crystal growth at the Ni3GaAs/GaAs interface and informing optimization strategies for GaAs device manufacturing.