Motohiro Tomita

Abstract The effect of the spreading resistance on the bileg thermoelectric generator (TEG) performance was experimentally evaluated. In planar bileg-TEGs, the width ratio of the p- and n-type legs should be carefully selected to compensate for the impedance mismatch between them and to maximize thermoelectric power generated from a unit area. In the bileg-TEG at the μm-scale, the electrical resistance becomes larger than a simple estimate using lumped parameter circuit model, which is caused by the spreading resistance; when a current flows from a narrower leg to a wider leg. A distance of greater than about 10 μm is required to distribute the electric current over the entire region of the wider leg. At shorter leg lengths, it is better to align the widths of p- and n-legs to maximize the areal power density of TEG. Decreasing the electrical resistance of the wiring between the p- and n-legs is also effective in enhancing the performance of the miniaturized TEG. The width of the p- and n-type legs in the bileg-TEG at the μm-scale should be carefully selected.

Abstract The performance of a thermoelectric (TE) generator consisting of GeSn wire is experimentally found to be higher than that of a TE generator fabricated by Si wire. The TE generators are developed in a cavity-free architecture, where the wires are directly placed on the substrate without forming a cavity space underneath. In the cavity-free structure, the heat current flows perpendicularly to the substrate and the TE generator is driven by a steep temperature gradient established around the heater inlet. With an identical patterning design, the TE performance of both generators is characterized by varying lengths. The maximum Seebeck coefficient of the generator consisting of GeSn is −277 μV K⁻¹ and that for the Si is −97 μV K⁻¹. The GeSn-TE generator achieves a higher power factor of 31 μW· K⁻²· cm⁻¹ than that of the Si-TE generator of 12 μW· K⁻²· cm⁻¹. The maximum areal power density of the GeSn-TE generator is intrinsically higher than that of the Si-TE generator by approximately 2.5 to 6 times considering the wire thickness difference. The obtained results support the superiority of the GeSn-TE generator over the Si-TE generator.

We report on the behavior of an acoustic phonon spectral linewidth of bulk single-crystalline Si_{1− x}Ge _x alloy with the x of 0.16, 0.32, and 0.45 in the phonon dispersion relation along the Γ–X ([00 q]) direction. Broadening of both transverse acoustic (TA) and longitudinal acoustic (LA) modes of the bulk Si_{1− x}Ge _x alloy was directly observed using inelastic x-ray scattering (IXS) with increasing momentum (from Γ to X points in the Brillouin zone), which cannot be observed in pure Si or pure Ge. The IXS spectral linewidth of the TA mode indicated Ge dependence, which suggests the overlapping of a low-energy local vibration mode (LVM) caused by Ge clusters surrounded by Si atoms around the X point. Although the behavior of the IXS spectral linewidth of the LA mode showed almost no dependence on Ge fraction, the IXS spectra of the LA mode indicated broadening after crossing with a low-energy LVM with increasing momentum. The results obtained by molecular dynamics showed almost the same behavior of the acoustic phonon spectral linewidth. These results suggest that a change in the acoustic phonon spectral linewidth between the Γ and X points indicates a reduction in the acoustic phonon lifetime caused by the appearance of a localized mode originated from a random atom position in the alloy structure, leading to suppression of the thermal transport in the SiGe alloy.

Abstract We investigate Sn incorporation effects on the thermoelectrical characteristics of n-type Ge-rich Ge_1−x−ySi_xSn_y layers (x ≈ 0.05−0.1, y ≈ 0.03) pseudomorphically grown on semi-insulating GaAs(001) substrates by molecular beam epitaxy. Despite the low Sn content of 3%, the Sn atoms play a role in suppressing the thermal conductivity from 13.5 to 9.0 Wm⁻¹ K⁻¹ without degradation of the electrical conductivity and the Seebeck coefficient. Furthermore, a relatively high power factor (maximum: 14 μW cm⁻¹ K⁻² at room temperature) was also achieved for the Ge_1−x−ySi_xSn_y layers, almost the same as the Si_1−xGe_x ones (maximum: 12 μW cm⁻¹ K⁻² at room temperature) grown with the same conditions. This result opens up the possibility of developing Sn-incorporated group-IV thermoelectric devices.

Ruthenium may replace copper interconnects in next-generation very-large-scale integration (VLSI) circuits. However, interfacial bonding between Ru interconnect wires and surrounding dielectrics must be optimized to reduce thermal boundary resistance (TBR) for thermal management. In this study, various adhesion layers are employed to modify bonding at the Ru/SiO2 interface. The TBRs of film stacks are measured using the frequency-domain thermoreflectance technique. TiN and TaN with high nitrogen contents significantly reduce the TBR of the Ru/SiO2 interface compared to common Ti and Ta adhesion layers. The adhesion layer thickness, on the other hand, has only minor effect on TBR when the thickness is within 2-10 nm. Hard X-ray photoelectron spectroscopy of deeply buried layers and interfaces quantitatively reveals that the decrease in TBR is attributed to the enhanced bonding of interfaces adjacent to the TaN adhesion layer, probably due to the electron transfer between the atoms at two sides of the interface. Simulations by a three-dimensional electrothermal finite element method demonstrate that decreasing the TBR leads to a significantly smaller temperature increase in the Ru interconnects. Our findings highlight the importance of TBR in the thermal management of VLSI circuits and pave the way for Ru interconnects to replace the current Cu-based ones.

The large anisotropic thermal conduction of a carbon nanotube (CNT) sheet that originates from the in-plane orientation of one-dimensional CNTs is disadvantageous for thermoelectric conversion using the Seebeck effect since the temperature gradient is difficult to maintain in the current flow direction. To control the orientation of the CNTs, polymer particles are introduced as orientation aligners upon sheet formation by vacuum filtration. The thermal conductivities in the in-plane direction decrease as the number of polymer particles in the sheet increases, while that in the through-plane direction increases. Consequently, a greater temperature gradient is observed for the anisotropy-controlled CNT sheet as compared to that detected for the CNT sheet without anisotropy control when a part of the sheet is heated, which results in a higher power density for the planar-type thermoelectric device. These findings are quite useful for the development of flexible and wearable thermoelectric batteries using CNT sheets.

<p>Thermal deposition of n-dopant onto SWCNT sheet (p-type) using patterned mask can fabricate p–n patterns with high special resolution. Thermoelectric generator using patterned SWCNT sheets exhibited power density of 60 nW cm⁻² at Δ<italic>T</italic> = 25 °C.</p>

Copyright © 2020 American Chemical Society. In microthermoelectric generators (μTEGs), parasitic thermal resistance must be suppressed to increase the temperature difference across thermocouples for optimum power generation. A thermally conductive (TC) layer is typically used in μTEGs to guide the heat flow from the heat source to the hot junction of each thermocouple. In this study, we investigate the effect of the thermal boundary resistance (TBR) in metal/dielectric TC layers on the power generation of silicon nanowire (SiNW) μTEGs. We prepared various metal/adhesion/dielectric TC layers using different metal, adhesion, and dielectric layers and measured the thermal resistance using the frequency-domain thermoreflectance method. We found that the thermal resistance was significantly different, mainly due to the TBR of the metal/dielectric interfaces. Interface characterization highlights the significant role of the interfacial bonding strength and interdiffusion in TBR. We fabricated a prototype SiNW-μTEG with different TC layers for testing, finding that the power generation increased significantly when the thermal resistance of the TC layer was lowered. This study helps to understand the underlying physics of thermal transport at interfaces and provides a guideline for the design and fabrication of μTEGs to enhance power generation for effective energy harvesting.

Copyright © 2020 American Chemical Society. Temperature increase in the continuously narrowing interconnects accelerates the performance and reliability degradation of very large scale integration (VLSI). Thermal boundary resistance (TBR) between an interconnect metal and dielectric interlayer has been neglected or treated approximately in conventional thermal analyses, resulting in significant uncertainties in performance and reliability. In this study, we investigated the effects of TBR between an interconnect metal and dielectric interlayer on temperature increase of Cu, Co, and Ru interconnects in deeply scaled VLSI. Results indicate that the measured TBR is significantly higher than the values predicted by the diffuse mismatch model and varies widely from 1 × 10-8 to 1 × 10-7 m2 K W-1 depending on the liner/barrier layer used. Finite element method simulations show that such a high TBR can cause a temperature increase of hundreds of degrees in the future VLSI interconnect. Characterization of interface properties shows the significant importance of interdiffusion and adhesion in TBR. For future advanced interconnects, Ru is better than Co for heat dissipation in terms of TBR. This study provides a guideline for the thermal management in deeply scaled VLSI.

Thermal conductivity characteristics of Si nanowires (SiNWs) treated with thermal oxidation before and after a subsequent Ar+ ion irradiation process were evaluated by UV Raman spectroscopy, in order to investigate the impact of interfacial oxide-induced lattice disorder. Laser-powerd-ependent Raman spectroscopy showed that the rise in temperature caused by laser heating of SiNWs is suppressed by the Ar+ ion irradiation process. It is considered that this suppression of an increase in temperature is caused by the Ar+ ion irradiation breaking bonds at the SiO2/SiNW interface. These results indicate that not only roughness and defects but also bonding characteristics at SiO2/SiNW interfaces should be carefully considered to achieve a low value of thermal conductivity for next-generation SiNW thermoelectric devices. To realize phonon scattering in SiNWs efficiently, optimization of thermal oxidation is necessary. (c) 2019 The Japan Society of Applied Physics

© 2019 Electrochemical Society Inc.. All rights reserved. We present a new design of silicon-based micro-thermoelectric generator, which utilizes silicon nanowires as the thermoelectric leg. It is driven by a steep temperature gradient exuding around a heat flow perpendicular to the substrate, and the silicon nanowires are not suspended on a cavity etched on the substrate. The power density is scalable by shortening the silicon nanowire to sub-μm length, which was experimentally demonstrated and tens of µW/cm2-class power generation was achieved at an externally applied temperature difference of only 5 K. A numerical discussion shows that the thermoelectric power can be drastically enhanced by suppressing the thermal resistance at the entire substrate. Thus, there is a plenty of room at the micro- or submicrometric scales for realizing thermal energy harvesting devices with high power densities.

© 2018 IEEE. We propose a planar device architecture compatible with the CMOS process technology as the optimal current benchmark of a Si-nanowire (NW) thermoelectric (TE) power generator. The proposed device is driven by a temperature gradient that is formed in the proximity of a perpendicular heat flow to the substrate. Therefore, unlike the conventional TE generators, the planar short Si-NWs need not be suspended on a cavity structure. Under an externally applied temperature difference of 5 K, the recorded TE power density is observed to be 12 μW/cm2 by shortening the Si-NWs length and suppressing the parasitic thermal resistance of the Si substrate. The demonstration paves a pathway to develop cost-effective autonomous internet-of-things applications that utilize the environmental and body heats.

For harvesting energy from waste heat, the power generation densities and fabrication costs of thermoelectric generators (TEGs) are considered more important than their conversion efficiency because waste heat energy is essentially obtained free of charge. In this study, we propose a miniaturized planar Si-nanowire micro-thermoelectric generator (SiNW-TEG) architecture, which could be simply fabricated using the complementary metal-oxide-semiconductor-compatible process. Compared with the conventional nanowire TEGs, this SiNW-TEG features the use of an exuded thermal field for power generation. Thus, there is no need to etch away the substrate to form suspended SiNWs, which leads to a low fabrication cost and well-protected SiNWs. We experimentally demonstrate that the power generation density of the SiNW-TEGs was enhanced by four orders of magnitude when the SiNWs were shortened from 280 to 8m. Furthermore, we reduced the parasitic thermal resistance, which becomes significant in the shortened SiNW-TEGs, by optimizing the fabrication process of AlN films as a thermally conductive layer. As a result, the power generation density of the SiNW-TEGs was enhanced by an order of magnitude for reactive sputtering as compared to non-reactive sputtering process. A power density of 27.9 nW/cm(2) has been achieved. By measuring the thermal conductivities of the two AlN films, we found that the reduction in the parasitic thermal resistance was caused by an increase in the thermal conductivity of the AlN film and a decrease in the thermal boundary resistance.

We provide the parameters of Stillinger-Weber potentials for GeSiSn ternary mixed systems. These parameters can be used in molecular dynamics (MD) simulations to reproduce phonon properties and thermal conductivities. The phonon dispersion relation is derived from the dynamical structure factor, which is calculated by the space-time Fourier transform of atomic trajectories in an MD simulation. The phonon properties and thermal conductivities of GeSiSn ternary crystals calculated using these parameters mostly reproduced both the findings of previous experiments and earlier calculations made using MD simulations. The atomic composition dependence of these properties in GeSiSn ternary crystals obtained by previous studies (both experimental and theoretical) and the calculated data were almost exactly reproduced by our proposed parameters. Moreover, the results of the MD simulation agree with the previous calculations made using a time-independent phonon Boltzmann transport equation with complicated scattering mechanisms. These scattering mechanisms are very important in complicated nanostructures, as they allow the heat-transfer properties to be more accurately calculated by MD simulations. This work enables us to predict the phonon- and heat-related properties of bulk group IV alloys, especially ternary alloys.

© 2018 IEEE. A best benchmark of Si-nanowire (NW) thermoelectric (TE) power generator has been achieved by our proposed planar device architecture compatible with CMOS process technology. The TE power density corresponds to 12 μW/cm2, which is recorded at an externally applied temperature difference of only 5 K. The demonstration opens up a pathway to cost effective autonomous internet of things (IoT) application utilizing environmental and body heats.

Raman spectroscopy is a powerful technique for revealing spatial heterogeneity in solid-state structures but heretofore has not been able to measure spectra from multiple positions on a sample within a short time. Here, we report a novel Raman spectroscopy approach to study the spatial heterogeneity in thermally annealed amorphous silicon (a-Si) thin films. Raman spectroscopy employs both a galvanomirror and a two-dimensional charge-coupled device detector system, which can measure spectra at 200 nm intervals at every position along a sample in a short time. We analyzed thermally annealed a-Si thin films with different film thicknesses. The experimental results suggest a correlation between the distribution of the average nanocrystal size over different spatial regions and the thickness of the thermally annealed a-Si thin film. The ability to evaluate the average size of the Si nanocrystals through rapid data acquisition is expected to lead to research into new applications of nanocrystals.

We demonstrate that the nickelidation (nickel silicidation) reaction rate of silicon nanowires (SiNWs) surrounded by a thermally grown silicon dioxide (SiO2) film is enhanced by post-oxidation annealing (POA). The SiNWs are fabricated by electron beam lithography, and some of the SiNWs are subjected to the POA process. The nickelidation reaction rate of the SiNWs is enhanced in the samples subjected to the POA treatment. Ultraviolet Raman spectroscopy measurements reveal that POA enhances compressive strain and lattice disorder in the SiNWs. By considering these experimental results in conjunction with our molecular dynamics simulation analysis, we conclude that the oxide-induced lattice disorder is the dominant origin of the increase in the nickelidation rate in smaller width SiNWs. This study sheds light on the pivotal role of lattice disorders in controlling metallic contact formation in SiNW devices. Published by AIP Publishing.

The evaluation of strain states in silicon nanowires (Si NWs) is important not only for the surrounding gate field-effect transistors but also for the thermoelectric Si NW devices to optimize their electric and thermoelectric performance characteristics. The strain states in Si NWs formed by different oxidation processes were evaluated by UV Raman spectroscopy. We confirmed that a higher tensile strain was induced by the partial presence of a tetraethyl orthosilicate (TEOS) SiO2 layer prior to the thermal oxidation. Furthermore, in order to measure biaxial stress states in Si NWs accurately, we performed water-immersion Raman spectroscopy. It was confirmed that the anisotropic biaxial stresses in the Si NWs along the length and width directions were compressive and tensile states, respectively. The Si NW with a TEOS SiO2 layer on top had a larger strain than the Si NW surrounded only by thermal SiO2. (C) 2017 The Japan Society of Applied Physics

A new device architecture of micro thermoelectric generator (mu-TEG) is proposed. The mu-TEG utilizes silicon nanowires as the thermoelectric (TE) material, and it can be fabricated by the CMOS-compatible process. It is driven by an "evanescent thermal field" exuding around a heat flow perpendicular to the substrate. We demonstrate experimentally that the TE power increases in the shorter TE leg lengths. The results show that the TE power density is scalable by miniaturizing and integrating the proposed structure.

We have newly developed the interatomic potential of Si, Ge or Ge, Sn mixed systems to reproduce the lattice constant, phonon frequency, and phonon dispersion relations in the bulk pure group IV crystal and group IV alloys by molecular dynamics (MD) simulation. The phonon dispersion relation is derived from the dynamical structure factor which is calculated by the space-time Fourier transform of atomic trajectories in MD simulation. The newly designed potential parameter set reproduces the experimental data of lattice constant and phonon frequency in Si, Ge, Sn, and SiGe. Furthermore, the Sn concentration dependence of the phonon frequency, which are not yet clarified, is calculated with three type assumptions of lattice constant in GeSn alloy. This work enables us to predict the elastic and phonon related properties of bulk group IV alloys.

© The Electrochemical Society. Anisotropic biaxial stress states in the high-Ge concentration Si1-xGex/Ge nanostructures were evaluated by oil-immersion Raman spectroscopy. Phonon deformation potentials (PDPs) are indispensable to convert the Raman frequency shift to stress in the Si1-xGex. Therefore, we investigated the accurate PDPs (p and q) of the Si1-xGex with the high Ge concentration by oil-immersion Raman spectroscopy. Using the derived PDPs, the clear uniaxial stress relaxation in the strained Si1-xGex nanostructure was observed.

The metal-oxide-semiconductor-field-effect-transistor (MOSFET) has been miniaturized for the high performance large-scale integrated-circuit (LSI). However, in the ultimately miniaturized MOSFET, the gate oxide failure with high leakage current is inevitable. In this study, we evaluated the origin of the gate oxide failure by Raman spectroscopy in conjunction with optical beam induced resistance change (OBIRCH) analysis. We confirmed the higher Raman intensity than the other positions at the gate oxide failure position, where the OBIRCH analysis shows the light emission. Moreover, we found that the origin on the gate oxide failure was high tensile strain in the gate polycrystalline silicon electrode.

We applied surface-enhanced Raman spectroscopy (SERS) to the excitation of transversal optical (TO) phonos in strained SiGe. The SERS technique can greatly enhance the Raman signal owing to metal-surface plasmon resonance. Furthermore, the electrical field includes a large amount of z-polarization, which can excite TO phonons. In this study, we evaluated anisotropic biaxial stress state in thin strained-SiGe layer on a Si substrate with the SERS technique.

Local anisotropic strain relaxation at the free edge of the stained SiGe layers after isolation of strained SiGe layers was evaluated using the high-NA and oil-immersion Raman method adopting high numerical aperture (NA:1.4) lens and oil immersion techniques. It was confirmed that forbidden optical phonon mode (TO) can be effectively excited with the technique, and that the anisotropic strain measurement was realized for the strained-SiGe layers. It was found that the strain was more significantly relax in St-SGOI than in St-SiGe around each edge. The result implies that the relaxation mechanism of the SiGe mesas on the SiO2-Box layer and on the Si substrate may be different from each other. (C) 2013 Elsevier Ltd. All rights reserved.

Anisotropic biaxial stress states in Si1-xGex/Si mesa structures were evaluated by oil-immersion Raman spectroscopy. Using a high-numerical-aperture lens, the electrical field component perpendicular to the surface, i.e., z-polarization, can be obtained. The z-polarization enables the excitation of the forbidden optical phonon mode, i.e., the transverse optical (TO) phonon mode, even under the backscattering geometry from (001)-oriented diamond-type crystals. The anisotropic biaxial stress evaluation of Si1-xGex was considered difficult compared with that of Si, because many unknown parameters exist for Si1-xGex, e. g., phonon deformation potentials (PDPs), the Ge concentration x, and the factor of Raman shift on x. In this study, PDPs and the Ge concentration in Si1-xGex were investigated in detail. As a result, using precise PDPs and x, a clear dependence of anisotropic biaxial stress states in Si1-xGex on the mesa structure shape was observed. (C) 2013 The Japan Society of Applied Physics

A strained SiGe layer will be used in next-generation transistors to improve device performance along with device scaling. However, the stress relaxation of the SiGe layer may be inevitable in nanodevices, because the SiGe layer is processed into a nanostructure. In this study, we evaluated the anisotropic stress relaxation in mesa-shaped strained SiGe layers on a Si substrate by electron backscattering pattern (EBSP) measurement. Moreover, we compared the results of EBSP measurement with those of anisotropic Raman measurement and finite element method (FEM) simulation. As a result, the anisotropic stress relaxation obtained by Raman spectroscopy was confirmed by EBSP measurement. Additionally, we obtained a good correlation between the results of EBSP measurement and FEM simulation. The xx and yy stresses were markedly relaxed and the zz and xz stresses were concentrated at the SiGe layer edges. These stresses were mostly relaxed in the distance range from the SiGe layer edges to 200 nm. Therefore, in a SiGe nanostructure with a scale of less than 200 nm, stress relaxation is inevitable. The results of EBSP and Raman measurements, and FEM simulation show a common tendency. We believe that EBSP measurement is useful for the evaluation of stress tensors and is complementary to Raman measurement. © 2013 The Japan Society of Applied Physics.

A strained SiGe layer will be used in next-generation transistors to improve device performance along with device scaling. However, the stress relaxation of SiGe layer may be inevitable in nanodevices, because the SiGe layer is processed into nanostructure. In this study, we evaluated the stress relaxation profiles in mesa-shaped strained SiGe layers on Si substrate by electron back scattering pattern (EBSP), super-resolution Raman spectroscopy (SRRS) measurements, and finite element method (FEM) simulation. As a result, the stress relaxation profile with high spatial resolution was obtained by SRRS and EBSP measurements. The precise shear stress profiles were also obtained by EBSP measurement. Moreover, these stress profiles were reproduced by FEM simulation. The spatial resolution of EBSP and SRRS were estimated less than 100 nm. Thus, it is prospective to evaluate the precise stress relaxation profile in the sub-100 nm order devices by EBSP and SRRS measurements, respectively.

We demonstrate the results of a strain (stress) evaluation obtained from Raman spectroscopy measurements with the super-resolution method (the so-called super-resolution Raman spectroscopy) for a Si substrate with a patterned SiN film (serving as a strained Si sample). To improve the spatial resolution of Raman spectroscopy, we used the super-resolution method and a high-numerical-aperture immersion lens. Additionally, we estimated the spatial resolution by an edge force model (EFM) calculation. One- and two- dimensional stress distributions in the Si substrate with the patterned SiN film were obtained by super-resolution Raman spectroscopy. The results from both super-resolution Raman spectroscopy and the EFM calculation were compared and were found to correlate well. The best spatial resolution, 70 nm, was achieved by super-resolution Raman measurements with an oil immersion lens. We conclude that super-resolution Raman spectroscopy is a useful method for evaluating stress in miniaturized state-of-the-art transistors, and we believe that the super-resolution method will soon be a requisite technique.

Precise stress measurements have been desired in order to apply strained Si substrates to next-generation transistors. Oil-immersion Raman spectroscopy enables the evaluation of the anisotropic stress state in the strained Si layer of the strained Si substrate even under (001)-oriented Si backscattering geometry. First, we found that the phonon deformation potentials (PDPs) reported by Anastassakis et al. in 1990 was the most valid among the three sets of PDP previous reported. Using these PDPs, the precise Raman measurements of biaxial stress in strained Si-on-insulator (SSOI) nanostructures were performed. The biaxial stresses sigma(xx) and sigma(yy) decreased with the decrease in SSOI width and length, which was consistent with the finite element method calculation. (C) 2012 The Japan Society of Applied Physics

We have investigated strain relaxation of strained SiGe layers after mesa isolation with a newly developed Raman method with a high number aperture (NA) lens and an immersion technique. It was confirmed that forbidden optical phonon mode (TO) can be effectively excited with the high-NA (1.4) lens and oil immersion technique, and that the non-destructive, and anisotropic strain measurement was successively realized for the strained-SiGe layers. On the other hand, it was found that the strain was more significantly relax in St-SGOI mesas than in St-SiGe mesas. The result implies that the relaxation mechanism in the strained SiGe/Si layer is different from that in St-SGOI layer. © 2012 IEEE.

Global and local strained-Si samples, namely strained-Si on insulator (SSOI) wafer and a Si substrate with a patterned SiN film were each evaluated by electron backscattering pattern (EBSP). In the EBSP measurements for SSOI, biaxial tensile stresses (biaxial tensile strains and compressive strain perpendicular to the surface) were obtained, whose values were consistent with those obtained by UV-Raman spectroscopy. One-dimensional stress distributions in the Si substrate with the patterned SiN film were obtained by EBSP, UV-Raman spectroscopy with a deconvolution method, and edge force model calculation. The results were well consistent with each other. EBSP allows us to measure stress and strain in the patterned SiN sample with 150-nm wide space. Furthermore, anisotropic biaxial stress including shear stress was also obtained by EBSP.

We demonstrate the results of strain (stress) evaluation obtained from electron backscattering pattern (EBSP) measurement for samples of a strained Si-on-insulator (SSOI) and a Si substrate with a patterned SiN film. Two-dimensional stress distributions were obtained in 40 x 40 mu m(2) areas of the SSOI. The biaxial stress state was also obtained in the SSOI. Furthermore, clear cross-hatch contrast was observed, especially in the distribution of shear stress S-xy, in contrast to with the other distributions of normal stress S-xx and S-yy. One- and two-dimensional stress distributions in the Si substrate with the patterned SiN film were also obtained from EBSP measurement. Moreover, the results were compared with those of UV-Raman measurement and edge force model calculation, and were found to have a good correlation with each other. EBSP measurement was used to measure the complicated biaxial stress including the shear stress in a sample with a 150-nm-wide space pattern. We can conclude that EBSP measurement is a useful method for precisely measuring stress with high spatial resolution. (c) 2011 The Japan Society of Applied Physics