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Hidenobu Mori

  (森 英喜)

Profile Information

Affiliation
Research assistant, Graduate School of Engineering, University of Hyogo
Degree
博士(工学)(東海大学)

J-GLOBAL ID
200901074568383534
researchmap Member ID
5000049229

External link

Committee Memberships

 1

Papers

 23
  • Hidenobu Mori, Haruhiko Yoshida
    2023 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), Nov 16, 2023  Peer-reviewed
  • Hidenobu Mori, Haruhiko Yoshida
    2022 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK), Nov 28, 2022  Peer-reviewed
  • Hidenobu Mori, Haruhiko Yoshida
    IMFEDK 2018 - 2018 International Meeting for Future of Electron Devices, Kansai, Dec 19, 2018  
    Microscopic characterization of generation lifetimes in a SiO 2 /Si structure has been carried out using scanning capacitance microscopy (SCM). Generation lifetimes could be investigated by monitoring the capacitance transient due to inversion layer formation. The validity of local capacitance transient measurements by SCM was verified by comparing with the results of conventional capacitance transient measurements using a MOS capacitor. Furthermore, it was demonstrated that SCM can be used for imaging of the formation process of the inversion layer on a nanometer scale.
  • Haruhiko Yoshida, Hidenobu Mori
    AIP ADVANCES, 6(10), Oct, 2016  Peer-reviewed
    Contactless capacitance transient techniques have been applied to local mapping of interface traps of a semiconductor wafer. In contactless capacitance transient techniques, a Metal-Air gap-Oxide-Semiconductor (MAOS) structure is used instead of a conventional Metal-Oxide-Semiconductor (MOS) structure. The local mapping of interface traps was obtained by using a contactless Isothermal Capacitance Transient Spectroscopy (ICTS), which is one of the contactless capacitance transient techniques. The validity of the contactless ICTS was demonstrated by characterizing a partially Au-doped Si wafer. The results revealed that local mapping of interface traps using contactless capacitance transient techniques is effective in wafer inspection and is a promising technique for the development of MOS devices and solar cells with high reliability and high performance. (C) 2016 Author(s).
  • Shinobu Onoda, Toshio Hirao, Jamie Stuart Laird, Hidenobu Mori, Hisayoshi Itoh, Takeshi Wakasa, Tsuyoshi Okamoto, Yoshiharu Koizumi
    Nuclear Instruments and Methods in Physics Research, Section B: Beam Interactions with Materials and Atoms, 210 232-236, Sep, 2003  Peer-reviewed
    In recent years, special interests have been paid to the advantage of using III-V compound semiconductors for the microelectronic and optoelectronic industries because of its high-speed response. Ion beam induced charge (IBIC) and transient-IBIC techniques are useful in order to investigate the single event effects, which is one of the most serious problems to use semiconductor devices in space. During image collection, the ion-induced damage is introduced. Therefore the degradation behavior of collected charge and transient current are important issue to use these techniques most effectively. To estimate degradation behavior, the damage factors of InGaAs devices are compared with that of Si devices by using the concept of non-ionizing energy loss. © 2003 Elsevier B.V. All rights reserved.

Misc.

 22

Presentations

 16

Professional Memberships

 3

Research Projects

 2